Sep 16, 2018  This video explains everything you need to know about PCIe slots, including PCIe slot sizes, lanes, versions and compatibility. Also included is a quick history of motherboard expansion slots. Nov 14, 2013  A port is typically an external expansion terminal while a slot is internal. You hook up USB devices to a port while you install video cards in a slot. Sep 23, 2017  namstey dosto aap sabhi ka phir se bahut-2 swagat hai hamare aur aapke channel par. Aaj ki iss video me hum shikhege PCI SLOT and PCIe ke bare me ki PCI SLOT PCIE SLOT.

• Expansion Slots Types
• Expansion Slots
• Difference Between Ports And Slots

In computing, the expansion card, expansion board, adapter card or accessory card is a printed circuit board that can be inserted into an electrical connector, or expansion slot, on a computer motherboard, backplane or riser card to add functionality to a computer system via the expansion bus.

An expansion bus is a computer bus which moves information between the internal hardware of a computer system (including the CPU and RAM) and peripheral devices. It is a collection of wires and protocols that allows for the expansion of a computer.^[1]

• 1History

History[edit]

Even vacuum-tube based computers had modular construction, but individual functions for peripheral devices filled a cabinet, not just a printed circuit board. Processor, memory and I/O cards became feasible with the development of integrated circuits. Expansion cards allowed a processor system to be adapted to the needs of the user, allowing variations in the type of devices connected, additions to memory, or optional features to the central processor (such as a floating point unit). Minicomputers, starting with the PDP-8, were made of multiple cards, all powered by and communicating through a passive backplane.

The first commercial microcomputer to feature expansion slots was the Micral N, in 1973. The first company to establish a de facto standard was Altair with the Altair 8800, developed 1974-1975, which later became a multi-manufacturer standard, the S-100 bus. Many of these computers were also passive backplane designs, where all elements of the computer, (processor, memory, and I/O) plugged into a card cage which passively distributed signals and power between the cards.

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Proprietary bus implementations for systems such as the Apple II co-existed with multi-manufacturer standards.

IBM PC and descendants[edit]

IBM introduced what would retroactively be called the Industry Standard Architecture (ISA) bus with the IBM PC in 1981. At that time, the technology was called the PC bus. The IBM XT, introduced in 1983, used the same bus (with slight exception). The 8-bit PC and XT bus was extended with the introduction of the IBM AT in 1984. This used a second connector for extending the address and data bus over the XT, but was backward compatible; 8-bit cards were still usable in the AT 16-bit slots. Industry Standard Architecture (ISA) became the designation for the IBM AT bus after other types were developed. Users of the ISA bus had to have in-depth knowledge of the hardware they were adding to properly connect the devices, since memory addresses, I/O port addresses, and DMA channels had to be configured by switches or jumpers on the card to match the settings in driver software.

IBM's MCA bus, developed for the PS/2 in 1987, was a competitor to ISA, also their design, but fell out of favor due to the ISA's industry-wide acceptance and IBM's licensing of MCA. EISA, the 32-bit extended version of ISA championed by Compaq, was used on some PC motherboards until 1997, when Microsoft declared it a 'legacy' subsystem in the PC 97 industry white-paper. Proprietary local buses (q.v. Compaq) and then the VESA Local Bus Standard, were late 1980s expansion buses that were tied but not exclusive to the 80386 and 80486 CPU bus.^[2][3][4] The PC/104 bus is an embedded bus that copies the ISA bus.

Intel launched their PCI bus chipsets along with the P5-based Pentium CPUs in 1993. The PCI bus was introduced in 1991 as a replacement for ISA. The standard (now at version 3.0) is found on PC motherboards to this day. The PCI standard supports bus bridging: as many as ten daisy chained PCI buses have been tested. Cardbus, using the PCMCIA connector, is a PCI format that attaches peripherals to the Host PCI Bus via PCI to PCI Bridge. Cardbus is being supplanted by ExpressCard format.

Intel introduced the AGP bus in 1997 as a dedicated video acceleration solution. AGP devices are logically attached to the PCI bus over a PCI-to-PCI bridge. Though termed a bus, AGP usually supports only a single card at a time (LegacyBIOS support issues). From 2005 PCI-Express has been replacing both PCI and AGP. This standard, approved^{[Like whom?]} in 2004, implements the logical PCI protocol over a serial communication interface. PC/104(-Plus) or Mini PCI are often added for expansion on small form factor boards such as Mini-ITX.

For their 1000 EX and 1000 HX models, Tandy Computer designed the PLUS expansion interface, an adaptation of the XT-bus supporting cards of a smaller form factor. Because it is electrically compatible with the XT bus (a.k.a. 8-bit ISA or XT-ISA), a passive adapter can be made to connect XT cards to a PLUS expansion connector. Another feature of PLUS cards is that they are stackable. Another bus that offered stackable expansion modules was the 'sidecar' bus used by the IBM PCjr. This may have been electrically comparable to the XT bus; it most certainly had some similarities since both essentially exposed the 8088 CPU's address and data buses, with some buffering and latching, the addition of interrupts and DMA provided by Intel add-on chips, and a few system fault detection lines (Power Good, Memory Check, I/O Channel Check). Again, PCjr sidecars are not technically expansion cards, but expansion modules, with the only difference being that the sidecar is an expansion card enclosed in a plastic box (with holes exposing the connectors).

Other families[edit]

Most other computer lines, including those from Apple Inc. (Apple II, Macintosh), Tandy, Commodore, Amiga, and Atari, offered their own expansion buses. The Amiga used Zorro II. Apple used a proprietary system with seven 50-pin-slots for Apple II peripheral cards, then later used the NuBus for its Macintosh series until 1995, when they switched to a PCI Bus. Generally, PCI expansion cards will function on any CPU platform if there is a software driver for that type. PCI video cards and other cards that contain a BIOS are problematic, although video cards conforming to VESA Standards may be used for secondary monitors. DEC Alpha, IBM PowerPC, and NEC MIPS workstations used PCI bus connectors.^[5] Both Zorro II and NuBus were plug and play, requiring no hardware configuration by the user.

Even many video game consoles, such as the Sega Genesis, included expansion buses; at least in the case of the Genesis, the expansion bus was proprietary, and in fact the cartridge slots of many cartridge based consoles (not including the Atari 2600) would qualify as expansion buses, as they exposed both read and write capabilities of the system's internal bus. However, the expansion modules attached to these interfaces, though functionally the same as expansion cards, are not technically expansion cards, due to their physical form.

Other computer buses were used for industrial control, instruments, and scientific systems. Some of these standards were VMEbus, STD Bus, and others.

External expansion buses[edit]

Laptops generally are unable to accept most expansion cards. Several compact expansion standards were developed. The original PC Card expansion card standard is essentially a compact version of the ISA bus. The CardBus expansion card standard is an evolution of the PC card standard to make it into a compact version of the PCI bus. The original ExpressCard standard acts like it is either a USB 2.0 peripheral or a PCI Express 1.x x1 device. ExpressCard 2.0 adds SuperSpeed USB as another type of interface the card can use. Unfortunately, CardBus and ExpressCard are vulnerable to DMA attack unless the laptop has an IOMMU that is configured to thwart these attacks.

Applications[edit]

The primary purpose of an expansion card is to provide or expand on features not offered by the motherboard. For example, the original IBM PC did not have on-board graphics or hard drive capability. In that case, a graphics card and an ST-506 hard disk controller card provided graphics capability and hard drive interface respectively. Some single-board computers made no provision for expansion cards, and may only have provided IC sockets on the board for limited changes or customization. Since reliable multi-pin connectors are relatively costly, some mass-market systems such as home computers had no expansion slots and instead used a card-edge connector at the edge of the main board, putting the costly matching socket into the cost of the peripheral device.

In the case of expansion of on-board capability, a motherboard may provide a single serial RS232 port or Ethernet port. An expansion card can be installed to offer multiple RS232 ports or multiple and higher bandwidth Ethernet ports. In this case, the motherboard provides basic functionality but the expansion card offers additional or enhanced ports.

Physical construction[edit]

One edge of the expansion card holds the contacts (the edge connector or pin header) that fit into the slot. They establish the electrical contact between the electronics on the card and on the motherboard. Peripheral expansion cards generally have connectors for external cables. In the PC-compatible personal computer, these connectors were located in the support bracket at the back of the cabinet. Industrial backplane systems had connectors mounted on the top edge of the card, opposite to the backplane pins.

Depending on the form factor of the motherboard and case, around one to seven expansion cards can be added to a computer system. 19 or more expansion cards can be installed in backplane systems. When many expansion cards are added to a system, total power consumption and heat dissipation become limiting factors. Some expansion cards take up more than one slot space. For example, many graphics cards on the market as of 2010 are dual slot graphics cards, using the second slot as a place to put an active heat sink with a fan.

Some cards are 'low-profile' cards, meaning that they are shorter than standard cards and will fit in a lower height computer chassis. (There is a 'low profile PCI card' standard^[6] that specifies a much smaller bracket and board area). The group of expansion cards that are used for external connectivity, such as network, SAN or modem cards, are commonly referred to as input/output cards (or I/O cards).

Daughterboard[edit]

A daughterboard, daughtercard, mezzanine board or piggyback board is an expansion card that attaches to a system directly. ^[7] Daughterboards often have plugs, sockets, pins or other attachments for other boards. Daughterboards often have only internal connections within a computer or other electronic devices, and usually access the motherboard directly rather than through a computer bus.

Daughterboards are sometimes used in computers in order to allow for expansion cards to fit parallel to the motherboard, usually to maintain a small form factor. This form are also called riser cards, or risers. Daughterboards are also sometimes used to expand the basic functionality of an electronic device, such as when a certain model has features added to it and is released as a new or separate model. Rather than redesigning the first model completely, a daughterboard may be added to a special connector on the main board. These usually fit on top of and parallel to the board, separated by spacers or standoffs, and are sometimes called mezzanine cards due to being stacked like the mezzanine of a theatre. Wavetable cards (sample-based synthesis cards) are often mounted on sound cards in this manner.

Some mezzanine card interface standards includethe 400 pin FPGA Mezzanine Card (FMC);the 172 pin High Speed Mezzanine Card (HSMC);^[8][9]the PCI Mezzanine Card (PMC);XMC mezzanines;the Advanced Mezzanine Card;IndustryPacks (VITA 4), the GreenSpring Computers Mezzanine modules;etc.

Examples of daughterboard-style expansion cards include:

• Enhanced Graphics Adapter piggyback board, adds memory beyond 64 KB, up to 256 KB^[10]
• Expanded memory piggyback board, adds additional memory to some EMS and EEMS boards^[11]
• ADD daughterboard
• RAID daughterboard
• Network interface controller (NIC) daughterboard
• CPU Socket daughterboard
• Bluetooth daughterboard
• Modem daughterboard
• AD/DA/DIO daughter-card
• Communication daughterboard (CDC)
• Server Management daughterboard (SMDC)
• Serial ATA connector daughterboard
• Robotic daughterboard
• Access control List daughterboard
• Arduino 'shield' daughterboards
• Beaglebone 'cape' daughterboard
• Raspberry Pi 'HAT' daughterboard.
• Network Daughterboard (NDB). Commonly integrates: bus interfaces logic, LLC, PHY and Magnetics onto a single board.

Standards[edit]

• PCI Extended (PCI-X)
• PCI Express (PCIe)
• Accelerated Graphics Port (AGP)
• Conventional PCI (PCI)
• Industry Standard Architecture (ISA)
• Micro Channel architecture (MCA)
• VESA Local Bus (VLB)
• CardBus/PC card/PCMCIA (for notebook computers)
• ExpressCard (for notebook computers)
• Audio/modem riser (AMR)
• Communications and networking riser (CNR)
• CompactFlash (for handheld computers and high speed cameras and camcorders)
• SBus (1990s SPARC-based Sun computers)
• Zorro (Commodore Amiga)
• NuBus (Apple Macintosh)

See also[edit]

• M-Module, an industrial mezzanine standard for modular I/O

References[edit]

1. ^'What is expansion bus'. Webopedia.
2. ^'MB-54VP'. ArtOfHacking.com. Retrieved 2012-11-17.
3. ^'NX586'. ArtOfHacking.com. Retrieved 2012-11-17.
4. ^'LEOPARD 486SLC2 REV. B'. ArtOfHacking.com. Retrieved 2012-11-17.
5. ^'Motherboards'. Artofhacking.com. Retrieved 2012-11-17.
6. ^'PCI Mechanical Working Group ECN: Low Profile PCI Card'(PDF). Pcisig.com. Retrieved 2012-11-17.
7. ^ IEEE Std. 100 Authoritative Dictionary of IEEE Standards Terms, Seventh Edition, IEEE, 2000,ISBN0-7381-2601-2, page 284
8. ^Jens Kröger.'Data Transmission at High Rates via Kapton Flexprints for the Mu3e Experiment'.2014.p. 43 to 44.
9. ^Altera.'High Speed Mezzanine Card (HSMC) Specification'.p. 2-3.
10. ^Market Looks to EGA as De Facto Standard, InfoWorld, Aug 19, 1985
11. ^Product Comparison: 16-Bit EMS Memory, InfoWorld, Sep 7, 1987

External links[edit]

PCI-X, short for Peripheral Component Interconnect eXtended, is a computer bus and expansion card standard that enhances the 32-bit PCI local bus for higher bandwidth demanded mostly by servers and workstations. It uses a modified protocol to support higher clock speeds (up to 133 MHz), but is otherwise similar in electrical implementation. PCI-X 2.0 added speeds up to 533 MHz^[1]:23, with a reduction in electrical signal levels.

The slot is physically a 3.3 V PCI slot, with exactly the same size, location and pin assignments. The electrical specifications are compatible, but stricter. However, while most conventional PCI slots are the 85 mm long 32-bit version, most PCI-X devices use the 130 mm long 64-bit slot, to the point that 64-bit PCI connectors and PCI-X support are seen as synonymous.

PCI-X is in fact fully specified for both 32- and 64-bit PCI connectors^[2]:14, and PCI-X 2.0 added a 16-bit variant for embedded applications.^[1]:22

It has been replaced in modern designs by the similar-sounding PCI Express (officially abbreviated as PCIe),^[3] with a completely different connector and a very different electrical design, having one or more narrow but fast serial connection lanes instead of a number of slower connections in parallel.

• 1History

History[edit]

Background and motivation[edit]

In PCI, a transaction that cannot be completed immediately is postponed by either the target or the initiator issuing retry-cycles, during which no other agents can use the PCI bus. Since PCI lacks a split-response mechanism to permit the target to return data at a later time, the bus remains occupied by the target issuing retry-cycles until the read data is ready. In PCI-X, after the master issues the request, it disconnects from the PCI bus, allowing other agents to use the bus. The split-response containing the requested data is generated only when the target is ready to return all of the requested data. Split-responses increase bus efficiency by eliminating retry-cycles, during which no data can be transferred across the bus.

PCI also suffered from the relative scarcity of unique interrupt lines. With only 4 interrupt lines (INTA/B/C/D), systems with many PCI devices require multiple functions to share an interrupt line, complicating host-side interrupt-handling. PCI-X added Message Signaled Interrupts, an interrupt system using writes to host-memory. In MSI-mode, the function's interrupt is not signaled by asserting an INTx line. Instead, the function performs a memory-write to a system-configured region in host-memory. Since the content and address are configured on a per-function basis, MSI-mode interrupts are dedicated instead of shared. A PCI-X system allows both MSI-mode interrupts and legacy INTx interrupts to be used simultaneously (though not by the same function.)

The lack of registered I/Os limited PCI to a maximum frequency of 66 MHz. PCI-X I/Os are registered to the PCI clock, usually through means of a PLL to actively control I/O delay the bus pins. The improvement in setup time allows an increase in frequency to 133 MHz.

Expansion Slots Types

Some devices, most notably Gigabit Ethernet cards, SCSI controllers (Fibre Channel and Ultra320), and cluster interconnects could by themselves saturate the PCI bus's 133 MB/s bandwidth. Ports using a bus speed doubled to 66 MHz and a bus width doubled to 64 bits (with the pin count increased to 184 from 124), in combination or not, have been implemented. These extensions were loosely supported as optional parts of the PCI 2.x standards, but device compatibility beyond the basic 133 MB/s continued to be difficult.

Developers eventually used the combined 64-bit and 66-MHz extension as a foundation, and, anticipating future needs, established 66-MHz and 133-MHz variants with a maximum bandwidth of 532 MB/s and 1064 MB/s respectively. The joint result was submitted as PCI-X to the PCI Special Interest Group (Special Interest Group of the Association for Computing Machinery). Subsequent approval made it an open standard adoptable by all computer developers. The PCI SIG controls technical support, training, and compliance testing for PCI-X. IBM, Intel, Microelectronics, and Mylex were to develop supporting chipsets. 3Com and Adaptec were to develop compatible peripherals. To accelerate PCI-X adoption by the industry, Compaq offered PCI-X development tools at their Web site.

PCI-X 1.0[edit]

The PCI-X standard was developed jointly by IBM, HP, and Compaq and submitted for approval in 1998. It was an effort to codify proprietary server extensions to the PCI local bus to address several shortcomings in PCI, and increase performance of high bandwidth devices, such as Gigabit Ethernet, Fibre Channel, and Ultra3 SCSI cards, and allow processors to be interconnected in clusters.

Intel gave only a qualified welcome to PCI-X, stressing that the next generation bus would have to be a 'fundamentally new architecture'.^[4] According to Cary Snyder, a senior analyst with the Microprocessor Report, 'PCI-X took two years to take off,' because, to quote Rick Merritt of the EE Times: 'A falling-out between the PCI SIG and a key Intel interconnect designer who spearheaded development on the Accelerated Graphics Port caused Intel to pull out of the initial PCI-X effort'.^[5]

The first PCI-X products were manufactured in 1998, such as the Adaptec AHA-3950U2B dual Ultra2 Wide SCSI controller, however at that point the PCI-X connector was merely referred to as '64-bit ready PCI' on packaging, hinting at future forward compatibility. Actual PCI-X branding only became standard later, likely coinciding with widespread availability of PCI-X equipped motherboards. When more details of PCI Express were released in August 2001, PCI SIG chairman Roger Tipley expressed his belief that 'PCI-X is going to be in servers forever because it serves a certain level of functionality, and it may not be compelling to switch to 3GIO [PCI Express] for that functionality. We learned that from not being able to get rid of ISA. ISA hung around because of all of these systems that weren't high-volume parts.' Tipley also announced that (at the time) the PCI SIG was planning to fold PCI Express and PCI-X 2.0 into a single work tentatively called PCI 3.0,^[6] but that name was eventually used for a relatively minor revision of conventional PCI.^[7]

PCI-X 2.0[edit]

In 2003, the PCI SIG ratified PCI-X 2.0. It adds 266-MHz and 533-MHz variants, yielding roughly 2,132 MB/s and 4,266 MB/s throughput, respectively. PCI-X 2.0 makes additional protocol revisions that are designed to help system reliability and add Error-correcting codes to the bus to avoid re-sends.^[8] To deal with one of the most common complaints of the PCI-X form factor, the 184-pin connector, 16-bit ports were developed to allow PCI-X to be used in devices with tight space constraints. Similar to PCI-Express, PtP functions were added to allow for devices on the bus to talk to each other without burdening the CPU or bus controller.

Despite the various theoretical advantages of PCI-X 2.0 and its backward compatibility with PCI-X and PCI devices, it has not been implemented on a large scale (as of 2008). This lack of implementation primarily is because hardware vendors have chosen to integrate PCI Express instead.

IBM was one of the (few) vendors which provided PCI-X 2.0 (266 MHz) support in their System i5 Model 515, 520 and 525; IBM advertised these slots as suitable for 10 Gigabit Ethernet adapters, which they also provided.^[9]HP offered PCI-X 2.0 in some ProLiant servers and offered dual-port 4Gbit/s Fibre Channel adapters, also operating at 266 MHz.^[10]AMD supported PCI-X 2.0 (266 MHz) via its 8132 Hypertransport to PCI-X 2.0 tunnel chip.^[11][12]ServerWorks was a vocal supporter of PCI-X 2.0^[13] (to the detriment of the first generation PCI Express) particularly through its chief Raju Vegesna,^[14] who was however fired soon thereafter for roadmap disagreements with the Broadcom leadership.^[15]

In 2003, Dell announced it would skip PCI-X 2.0 in favor of more rapid adoption of PCI Express solutions.^[16] As reported by PC Magazine, Intel began to sideline PCI-X in their 2004 roadmap, in favor of PCI Express, arguing that the latter had substantial advantages in terms of system latency and power consumption, more dramatically stated as avoiding 'the 1,000-pin apocalypse' for their Tumwater chipset.^[17]

Technical description[edit]

PCI-X revised the conventional PCI standard by doubling the maximum clock speed (from 66 MHz to 133 MHz)^[8] and hence the amount of data exchanged between the computer processor and peripherals. Conventional PCI supports up to 64 bits at 66 MHz (though anything above 32 bits at 33 MHz is seen only in high-end systems). The theoretical maximum amount of data exchanged between the processor and peripherals with PCI-X is 1.06 GB/s, compared to 133 MB/s with standard PCI. PCI-X also improves the fault tolerance of PCI, allowing, for example, faulty cards to be reinitialized or taken offline.

PCI-X is backward compatible to PCI in the sense that the entire bus falls back to PCI if any card on the bus does not support PCI-X.

The two most fundamental changes are:

• The shortest time between a signal appearing on the PCI bus and a response to that signal occurring on the bus has been extended to 2 cycles, rather than 1. This allows much faster clock rates, but causes many protocol changes:
  • The ability of the conventional PCI bus protocol to insert wait states on any cycle based on the IRDY# and TRDY# signals has been deleted; PCI-X only allows bursts to be interrupted at 128-byte boundaries.
  • The initiator must deassert FRAME# two cycles before the end of the transaction.
  • The initiator may not insert wait states. The target may, but only before any data is transferred, and wait states for writes are limited to multiples of 2 clock cycles.
  • Likewise, the length of a burst is decided before it begins; it may not be halted on an arbitrary cycle using the FRAME# and STOP# signals.
  • Subtractive decode DEVSEL# takes place two cycles after the 'slow DEVSEL#' cycle rather than on the next cycle.
• After the address phase (and before any device has responded with DEVSEL#), there is an additional 1-cycle 'attribute phase', during which 36 additional bits (both AD and C/BE# lines are used) of information about the operation are transmitted. These include 16 bits of requester identification (PCI bus, device and function number), 12 bits of burst length, 5 bits of tag (for associating split transactions), and 3 bits of additional status.

Versions[edit]

Expansion Slots

Essentially all PCI-X cards or slots have a 64-bit implementation and vary as follows:

• Cards
  • 66 MHz (added in Rev. 1.0)^[8]
  • 100 MHz (implemented by a 133 MHz adapter on some servers)^[18]
  • 133 MHz (added in Rev. 1.0)^[8]
  • 266 MHz (added in Rev. 2.0)^[8]
  • 533 MHz (added in Rev. 2.0)^[8]
• Slots
  • 66 MHz (can be found on older servers)
  • 133 MHz (most common on modern servers)
  • 266 MHz (rare, being replaced by PCI-e)
  • 533 MHz (rare, being replaced by PCI-e)

Mixing of 32-bit and 64-bit PCI cards in different width slots[edit]

Most 32-bit PCI cards will function properly in 64-bit PCI-X slots, but the bus speed will be limited to the clock frequency of the slowest card, an inherent limitation of PCI's shared bus topology. For example, when a PCI 2.3, if a 66-MHz peripheral is installed into a PCI-X bus capable of 133 MHz, the entire bus backplane will be limited to 66 MHz. To get around this limitation, many motherboards have multiple PCI/PCI-X buses, with one bus intended for use with high-speed PCI-X peripherals, and the other bus intended for general-purpose peripherals.

Many 64-bit PCI-X cards are designed to work in 32-bit mode if inserted in shorter 32-bit connectors, with some loss of speed.^[19][20] An example of this is the Adaptec 29160 64-bit SCSI interface card.^[21] However some 64-bit PCI-X cards do not work in standard 32-bit PCI slots.^[22] Even if it would work, installing a 64-bit PCI-X card in a 32-bit slot will leave the 64-bit portion of the card edge connector not connected and overhanging, which requires that there be no motherboard components positioned so as to mechanically obstruct the overhanging portion of the card edge connector.

Comparison with PCI-Express[edit]

Difference Between Ports And Slots

PCI-X is often confused by name with similar-sounding PCI Express, commonly abbreviated as PCI-E or PCIe, although the cards themselves are totally incompatible and look different. While they are both high-speed computer buses for internal peripherals, they differ in many ways. The first is that PCI-X is a 64-bit parallel interface that is backward compatible with 32-bit PCI devices. PCIe is a serial point-to-point connection with a different physical interface that was designed to supersede both PCI and PCI-X.

PCI-X and standard PCI buses may run on a PCIe bridge, similar to the way ISA buses ran on standard PCI buses in some computers. PCIe also matches PCI-X and even PCI-X 2.0 in maximum bandwidth. PCIe 1.0 x1 offers 250 MB/s in each direction (lane), and up to 16 lanes (x16) are currently supported each direction, in full-duplex, giving a maximum of 4 GB/s bandwidth in each direction. PCI-X 2.0 offers (at its maximum 64-bit 533-MHz variant) a maximum bandwidth of 4,266 MB/s (~4.3 GB/s), although only in half-duplex.

PCI-X has technological and economical disadvantages compared to PCI Express. The 64-bit parallel interface requires difficult trace routing, because, as with all parallel interfaces, the signals from the bus must arrive simultaneously or within a very short window, and noise from adjacent slots may cause interference. The serial interface of PCIe suffers fewer such problems and therefore does not require such complex and expensive designs. PCI-X buses, like standard PCI, are half-duplex bidirectional, whereas PCIe buses are full-duplex bidirectional. PCI-X buses run only as fast as the slowest device, whereas PCIe devices are able to independently negotiate the bus speed. Also, PCI-X slots are longer than PCIe 1x through PCIe 16x, which makes it impossible to make short cards for PCI-X. PCI-X slots take quite a bit of space on motherboards, which can be a problem for ATX and smaller form factors.

See also[edit]

References[edit]

1. ^ ^abPCI-X Protocol Addendum to the PCI Local Bus Specification. Revision 2.0. PCI Special Interest Group. 29 July 2002.
2. ^PCI-X Addendum to the PCI Local Bus Specification. Revision 1.0a. PCI Special Interest Group. 24 July 2000.
3. ^Jean Andrews (2010). A+ Guide to Managing and Maintaining Your PC. Cengage Learning. p. 187. ISBN978-1-4354-9778-8.
4. ^Lettice, John (1999-01-13). 'PCI-X Gang of Three challenges Intel with Future I/O'. The Register.
5. ^Merritt, Rick (2001-11-21). 'Servers gas up with 4-Gbyte/s PCI-X 2.0 spec'. EE Times.
6. ^Jerry Ascierto (8/30/2001) 'Intel details next-generation I/O spec', EE Times
7. ^http://www.pcisig.com/news_room/faqs/faq_pci30/pci30_faq.pdf
8. ^ ^abcdef'PCI-SIG — FAQ — PCI-X 2.0'. Retrieved 2008-02-17.
9. ^'PCI, PCI-X, PCI-X DDR, and PCIe Placement Rules for IBM System i Models'(PDF). p. 7. A third generation of PCI is now offered with the introduction of the 1.9 GHz System i5 Models 515, 520, and 525. These models have a PCI-X DDR (PCI-X 2.0) slot that runs at a maximum of 266 MHz and supports only adapters that can run without an IOP. This slot is ideally suited for ultra-high bandwidth adapters such as the new 266 MHz (DDR) #5721/#5722 10 Gb Ethernet adapters.
10. ^HP FC2243 Dual Channel 4Gb PCI-X 2.0 HBA
11. ^'AMD rolls out 8132 PCI-X tunnel part'. The Inquirer. 2004-06-14. Retrieved 2014-02-13.
12. ^Scott M. Mueller; Mark Edward Soper; Barrie Sosinsky (2006). Upgrading and Repairing Servers. Pearson Education. p. 366. ISBN978-0-13-279698-9.
13. ^https://web.archive.org/web/20030718015904/http://serverworks.com/technology/pdf/PCI-X_2-0_WhitePaper.pdf
14. ^ServerWorks chief spurns first-generation PCI Express
15. ^Broadcom ousts ServerWorks chief
16. ^PCI-X marks the spot for IBM, HP
17. ^Intel Begins Making Its Case Against PCI-X
18. ^'PCI-X vs. PCI-Express'. Archived from the original on February 25, 2005. Retrieved September 2, 2016.
19. ^ZNYX Networks (June 16, 2009). 'ZX370 Series'. Retrieved July 13, 2012. The ZX370 Series is a true 64-bit adapter, widening the network pipeline to achieve higher throughput, while offering backward compatibility with standard 32-bit PCI slots.
20. ^ZNYX Networks. 'ZX370 Series Multi-Channel PCI Fast Ethernet Adapter'(PDF). Retrieved July 13, 2012. Backward compatible with 32 bit, 33 MHz PCI slots
21. ^Adaptec (January 2000). 'Adaptec SCSI Card 29160 Ultra160 SCSI Controller User's Reference'(PDF). p. 1. Retrieved July 13, 2012. Although the Adaptec SCSI Card 29160 is a 64-bit PCI card, it also works in a 32-bit PCI slot. When installed in a 32-bit PCI slot, the card automatically runs in the slower 32-bit mode.
22. ^LaCie. 'LaCie support: Identify a variety of PCI slots'. Archived from the original on April 4, 2012. Retrieved July 13, 2012.^{[unreliable source?]}

Further reading[edit]

• PCI Bus Demystified; 2nd Ed; Doug Abbott; 250 pages; 2004; ISBN978-0-7506-7739-4.
• PCI-X System Architecture; 1st Ed; Tom Shanley; 752 pages; 2000; ISBN978-0-201-72682-4.
• PCI & PCI-X Hardware and Software Architecture & Design; 5th Ed; Ed Solari; 1140 pages; 2001; ISBN978-0-929392-63-9.
• Ray Weiss, (6/9/2000) 'PCI-X Exposed', EE Times

External links[edit]